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1 features description applications tps728xx series sbvs095 ? august 2007 www.ti.com 200ma low-dropout linear regulator with pin-selectable dual-voltage level output 2 very low dropout: 230mv typical at 200ma the tps728xx series of low-dropout linear regulators (ldos), with a selectable dual-voltage level output, is 3% accuracy over load/line/temperature designed specially for applications that require two low i q : 50 a in active mode levels of output voltage regulation. programming available in fixed-output voltages from 0.9v fuses and memory cards, reducing leakage effects, to 3.6v using innovative factory eeprom and conserving power in nanometric processes are programming some application examples. vset pin toggles output voltage between the vset pin is used to select one of two output two preset levels voltage levels preset through innovative factory eeprom programming. a precision bandgap and ? preset output voltage levels can be error amplifier provides an overall 3% accuracy over eeprom-programmed to any combination load, line, and temperature extremes. high psrr: 65db at 1khz ultra-small wafer chip scale (wcsp) and 2mm x stable with a 1.0 f ceramic capacitor 2mm son packages make the tps728xx series ideal thermal shutdown and over-current for handheld applications. protection this family of devices is fully specified over a available in wafer-level chip scale and temperature range of t j = ? 40 c to +125 c. 2mm x 2mm son packages power rails with programming mode dual voltage levels for power-saving mode leakage reduction for 90nm and 65nm processors wireless handsets, smart phones, pdas mp3 players and other handheld products (1) it is recommended that the son package thermal pad be connected to ground. 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 all trademarks are the property of their respective owners. production data information is current as of publication date. copyright ? 2007, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. outen in gnd vset c3 b2 a3 c1 a1 ingnd thermal pad (1) en 6 5 4 out vset nc 1 2 3 tps728xx series drv package 2mm x 2mm son-6 (top view) tps728xx series yzu package wcsp-5 (top view)
absolute maximum ratings (1) dissipation ratings tps728xx series sbvs095 ? august 2007 this integrated circuit can be damaged by esd. texas instruments recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ordering information (1) product v out (2) tps728 vvvxxxyyyz vvv is the nominal output voltage for v out1 and corresponds to v set = low. xxx is the nominal output voltage for v out2 and corresponds to v set = high. yyy is package designator. z is tape and reel quantity (r = 3000, t = 250). (1) for the most current package and ordering information see the package option addendum at the end of this document, or see the ti website at www.ti.com . (2) output voltages from 0.9v to 3.6v in 50mv increments are available through the use of innovative factory eeprom programming; minimum order quantities may apply. contact factory for details and availability. at t j = ? 40 c to +125 c (unless otherwise noted). all voltages are with respect to gnd. parameter tps728xx series unit input voltage range, v in ? 0.3 to +7.0 v enable and vset voltage range, v en and v set ? 0.3 to v in + 0.3 (2) v output voltage range, v out ? 0.3 to +7.0 v maximum output current, i out internally limited output short-circuit duration indefinite total continuous power dissipation, p diss see dissipation ratings table human body model (hbm) 2 kv esd rating charged device model (cdm) 500 v operating junction temperature range, t j ? 55 to +150 c storage temperature range, t stg ? 55 to +150 c (1) stresses above these ratings may cause permanent damage. exposure to absolute maximum conditions for extended periods may degrade device reliability. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) v en and v set absolute maximum rating is v in + 0.3v or +7.0v, whichever is less. derating factor board package r jc r ja above t a = +25 c t a < +25 c t a = +70 c t a = +85 c high-k (1) drv 20 c/w 65 c/w 15.4mw/ c 1540mw 845mw 615mw high-k (1) yzu 85 c/w 268 c/w 3.7mw/ c 370mw 205mw 150mw (1) the jedec high-k (2s2p) board used to derive this data was a 3- 3-inch, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. 2 submit documentation feedback copyright ? 2007, texas instruments incorporated www.ti.com
electrical characteristics tps728xx series sbvs095 ? august 2007 over operating temperature range (t j = ? 40 c to +125 c), v in = v out(typ) + 0.5v or 2.7v, whichever is greater; i out = 0.5ma, v set = v en = v in , c out = 1.0 f, unless otherwise noted. typical values are at t j = +25 c. parameter test conditions min typ max unit v in input voltage range 2.7 6.5 v nominal t j = +25 c, v set = high/low ? 2.5 +2.5 mv v out (1) dc output accuracy over v in , i out , v out + 0.5v v in 6.5v, ? 3.0 +3.0 % temperature 0ma i out 200ma, v set = high/low 100 a to 200ma in 1 s, v out load transient 60.0 mv 200ma to 100 a in 1 s, c out = 1 f v o output voltage range 0.9 3.6 v v out(nom) + 0.5v v in 6.5v, v o / v in line regulation 130 v/v i out = 5ma v o / i out load regulation 0ma i out 200ma 75 v/ma v do dropout voltage (2) v in = v out(nom) ? 0.1v, i out = 200ma 230 400 mv i cl output current limit v out = 0.9 v out(nom) 240 340 575 ma i out = 0ma 50 80 a i gnd ground pin current i out = 200ma 120 a v en 0.4v, 2.7v v in < 4.5v, i shdn shutdown current (i gnd ) 0.10 1.0 a t j = ? 40 c to +85 c f = 100hz 65 db v in = 3.8v, f = 1khz 65 db psrr power-supply rejection ratio v out = 2.8v, f = 10khz 55 db i out = 200ma f = 100khz 40 db bw = 100hz to 100khz, v in = 3.3v, v n output noise voltage 75 v out v rms v out = 2.8v, i out = 10ma transition time (low-to-high) v out_low = 1.8v, v out_high = 3.15v, t tr v out = v out_low to v out_high 60 s i out = 10ma v out = 97% v out_high t str startup time (3) c out = 1.0 f 160 s t shut shutdown time (4) r l = , c out = 1.0 f, v out = 2.8v 180 (5) s vset high (output v out2 selected), v hi 1.2 v in v or enable pin high (enabled) vset low (output v out1 selected), v lo 0 0.4 v or enable pin low (disabled) i en , i vset enable and select pin currents en = vset = 6.5v 0.04 1.0 a undervoltage lockout v in rising, v set = high/low 2.38 2.51 2.65 v uvlo hysteresis v in falling, v set = high/low 230 mv shutdown, temperature increasing +160 c t sd thermal shutdown temperature reset, temperature decreasing +140 c t j operating junction temperature ? 40 +125 c (1) the output voltage for v set = low/high is programmed at the factory. (2) v do is not measured for devices with v out(nom) < 2.8v because minimum v in = 2.7v. (3) time from v en = 1.2v to v out = 97% (v out(nom) ). (4) time from v en = 0.4v to v out = 5% (v out(nom) ). (5) see shutdown in the application information section for more details. copyright ? 2007, texas instruments incorporated submit documentation feedback 3 www.ti.com
device information tps728xx series sbvs095 ? august 2007 figure 1. functional block diagram 4 submit documentation feedback copyright ? 2007, texas instruments incorporated thermal shutdown 60 w current limit uvlo bandgap in en out eeprom mux vset logic activepull- down www.ti.com
tps728xx series sbvs095 ? august 2007 yzu package wcsp-5 (top view) drv package son-8 (top view) (1) it is recommended that the son package thermal pad be connected to ground. pin descriptions tps728xx series name drv yzu description regulated output voltage pin. a small 1 f ceramic capacitor is needed from this pin to ground to assure out 1 c1 stability. see input and output capacitor requirements in the application information section for more details. select pin. driving vset below 0.4v selects preset output voltage v out1 . driving vset over 1.2v selects vset 2 a3 preset output voltage v out2 . nc 3 ? no connection. enable pin. driving en over 1.2v turns on the regulator. driving en below 0.4v puts the regulator into en 4 a1 shutdown mode, thus reducing the operating current to 100na, nominal. gnd 5 b2 ground pin (connect drv thermal pad to ground) input pin. a small capacitor is needed from this pin to ground to assure stability. see input and output in 6 c3 capacitor requirements in the application information section for more details. copyright ? 2007, texas instruments incorporated submit documentation feedback 5 outen in gnd vset c3 b2 a3 c1 a1 ingnd en 6 5 4 out vset nc 1 2 3 thermal pad (1) www.ti.com
typical characteristics tps728xx series sbvs095 ? august 2007 over operating temperature range (t j = ? 40 c to +125 c), v in = v out(typ) + 0.5v or 2.7v, whichever is greater; i out = 0.5ma, v en = v set = v in , c out = 1.0 f, unless otherwise noted. typical values are at t j = +25 c. line regulation line regulation i out = 5ma, v out = 0.9v (nom) i out = 200ma, v out = 0.9v (nom) figure 2. figure 3. line regulation line regulation i out = 5ma, v out = 1.85v (nom) i out = 200ma, v out = 1.85v (nom) figure 4. figure 5. line regulation line regulation i out = 5ma, v out = 3.6v (nom) i out = 200ma, v out = 3.6v (nom) figure 6. figure 7. 6 submit documentation feedback copyright ? 2007, texas instruments incorporated 54 3 2 1 0 - 1 - 2 - 3 - 4 - 5 2.5 3.0 3.5 4.0 4.5 v (v) in d v (mv) out 5.0 5.5 6.0 6.5 t = 40 - j c t = +25 c j t = +85 c j t = +125 c j 10 86 4 2 0 - 2 - 4 - 6 - 8 - 10 2.5 3.0 3.5 4.0 4.5 v (v) in d v out (mv) 5.0 5.5 6.0 6.5 t = 40 - j c t j = +25 c t = +85 c j t j = +125 c www.ti.com 63 0 - 3 - 6 - 9 - 12 - 15 2.5 3.0 3.5 4.0 4.5 v (v) in d v ou t (mv) 5.0 5.5 6.0 6.5 t = 40 - j c t = +25 c j t = +85 c j t = +125 c j 63 0 - 3 - 6 - 9 - 2 - 15 - 18 - 21 2.5 3.0 3.5 4.0 4.5 v (v) in d v o ut (mv) 5.0 5.5 6.0 6.5 t = 40 - j c t = +25 c j t = +85 c j t = +125 c j 50 - 5 - 10 - 15 - 20 2.5 3.0 3.5 4.0 4.5 v (v) in d v o ut (mv) 5.0 5.5 6.0 6.5 t = 40 - j c t = +25 c j t = +85 c j t = +125 c j 10 50 - 5 - 10 - 15 - 20 - 25 - 30 2.5 3.0 3.5 4.0 4.5 v (v) in d v out (mv) 5.0 5.5 6.0 6.5 t j = 40 - c t = +25 c j t = +85 c j t = +125 c j
tps728xx series sbvs095 ? august 2007 typical characteristics (continued) over operating temperature range (t j = ? 40 c to +125 c), v in = v out(typ) + 0.5v or 2.7v, whichever is greater; i out = 0.5ma, v en = v set = v in , c out = 1.0 f, unless otherwise noted. typical values are at t j = +25 c. load regulation under light loads load regulation v out = 0.9v (nom) v out = 0.9v (nom) figure 8. figure 9. load regulation under light loads load regulation v out = 1.85v (nom) v out = 1.85v (nom) figure 10. figure 11. load regulation under light loads load regulation v out = 3.6v (nom) v out = 3.6v (nom) figure 12. figure 13. copyright ? 2007, texas instruments incorporated submit documentation feedback 7 2520 15 10 50 - 5 - 10 - 15 - 20 - 25 0 20 40 60 80 100 120 140 160 180 200 i (ma) out d v out (mv) t = 40 - j c t j = +25 c t j = +85 c t j = +125 c 2520 15 10 50 - 5 - 10 - 15 - 20 - 25 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 i (ma) out d v out (mv) t = 40 - j c t j = +25 c t j = +85 c t j = +125 c 10 50 - 5 - 10 - 15 - 20 - 25 - 30 - 35 0 20 40 60 80 100 120 140 160 180 200 i (ma) out d v out (mv) t = 40 - j c t j = +25 c t j = +85 c t j = +125 c www.ti.com 1510 50 - 5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 i (ma) out d v out (mv) t = - j 40 c t j = +25 c t j = +85 c t j = +125 c 10 50 - 5 - 10 - 15 - 20 - 25 0 20 40 60 80 100 120 140 160 180 200 i (ma) out d v out (mv) t = 40 - j c t j = +25 c t j = +85 c t j = +125 c 86 4 2 0 - 2 - 4 - 6 - 8 - 10 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 i (ma) out d v out (mv) t = 40 - j c t j = +25 c t j = +85 c t j = +125 c
tps728xx series sbvs095 ? august 2007 typical characteristics (continued) over operating temperature range (t j = ? 40 c to +125 c), v in = v out(typ) + 0.5v or 2.7v, whichever is greater; i out = 0.5ma, v en = v set = v in , c out = 1.0 f, unless otherwise noted. typical values are at t j = +25 c. dropout voltage output voltage vs output current vs temperature figure 14. figure 15. output voltage ground pin current vs temperature vs input voltage figure 16. figure 17. ground pin current ground pin current vs output current vs temperature figure 18. figure 19. 8 submit documentation feedback copyright ? 2007, texas instruments incorporated www.ti.com 2.01.5 1.0 0.5 0 - 0.5 - 1.0 - 1.5 - 2.0 - 40 - 25 - 10 5 20 35 50 65 80 95 110 125 t j ( c) d v (%) ou t i = 0.1ma out i = 5ma out i = 200ma out v = 3.6v out 5045 40 35 30 25 i ( a) gn d m t = 40 - j c t = +25 c j t = +85 c j t = +125 c j 2.5 3.0 3.5 4.0 4.5 v (v) in 5.0 5.5 6.0 6.5 i = 0ma out 300250 200 150 100 50 0 0 20 40 60 80 100 120 140 160 180 200 i (ma) out v (mv) do t = 40 - j c t = +25 c j t = +85 c j t = +125 c j v = 3.6v (nom) v = v 0.1v out in out - 32 1 0 - 1 - 2 - 3 - 40 - 25 - 10 5 20 35 50 65 80 95 110 125 t ( c) j d v (%) out i = 0.1ma out i = 5ma out i = 200ma out v = 0.9v out 150130 110 9070 50 30 0 20 40 60 80 100 120 140 160 180 200 i (ma) out i ( m gnd a) t = 40 - j c t = +25 j c t = +85 j c t = +125 j c 6055 50 45 40 35 30 - 40 - 25 - 10 5 20 35 50 65 80 95 110 125 t ( c) j i ( a) gnd m i = 0ma out
tps728xx series sbvs095 ? august 2007 typical characteristics (continued) over operating temperature range (t j = ? 40 c to +125 c), v in = v out(typ) + 0.5v or 2.7v, whichever is greater; i out = 0.5ma, v en = v set = v in , c out = 1.0 f, unless otherwise noted. typical values are at t j = +25 c. shutdown current current limit vs input voltage vs input voltage figure 20. figure 21. current limit tps728185315 power-supply ripple rejection vs input voltage vs frequency (v in ? v out = 0.85v) figure 22. figure 23. tps728185315 power-supply ripple rejection tps728185315 power-supply ripple rejection vs frequency (v in ? v out = 1.0v) vs frequency (v in ? v out = 0.5v) figure 24. figure 25. copyright ? 2007, texas instruments incorporated submit documentation feedback 9 9080 70 60 50 40 30 20 10 0 10 100 1k 10k 100k 1m frequency (hz) psrr (db) 10m 200ma 100ma 5ma v = 2.85v in v = 1.85v c = 1 f out out m 9080 70 60 50 40 30 20 10 0 10 100 1k 10k 100k 1m frequency (hz) psrr (db) 10m 200ma 100ma 5ma v = 2.7v in v = 1.85v c = 1 f out out m 350340 330 320 310 300 290 280 270 2.5 3.0 3.5 4.0 4.5 v (v) in current limit (ma) 5.0 5.5 6.0 6.5 t = 40 - j c t = +25 j c t = +85 j c t = +125 j c v = 3.6v (nom) out www.ti.com 16001400 1200 1000 800600 400 200 0 2.5 3.0 3.5 4.0 4.5 v (v) in i (na) sh dn 5.0 5.5 6.0 6.5 t = 40 - j c t = +25 c j t = +85 c j t = +125 c j i = 0ma out 9080 70 60 50 40 30 20 10 0 10 100 1k 10k 100k 1m frequency (hz) psrr (db) 10m 200ma 100ma 5ma v = 3.65v in v = 3.15v c = 1 f out out m 350340 330 320 310 300 290 280 270 2.5 3.0 3.5 4.0 4.5 v (v) in current limit (ma) 5.0 5.5 6.0 6.5 t = 40 - j c t = +25 j c t = +85 j c t = +125 j c v = 0.9v (nom) out
tps728xx series sbvs095 ? august 2007 typical characteristics (continued) over operating temperature range (t j = ? 40 c to +125 c), v in = v out(typ) + 0.5v or 2.7v, whichever is greater; i out = 0.5ma, v en = v set = v in , c out = 1.0 f, unless otherwise noted. typical values are at t j = +25 c. tps728185315 power-supply ripple rejection output spectral noise density vs frequency (v in ? v out = 1.0v) vs frequency figure 26. figure 27. output spectral noise density vs frequency line transient response figure 28. figure 29. line transient response load transient response figure 30. figure 31. 10 submit documentation feedback copyright ? 2007, texas instruments incorporated www.ti.com 10 1 0.1 0.01 10 100 1k 10k frequency (hz) output spectal noise density ( m v/ ? ) hz 100k load i = 200ma out c = c = 1 m in out f v = 3.15v out noise = 217 v m rms time (100 s ) m /div v = 3.8v to 6.5v, slew rate = 1v/ s v = 3.3v, i = 200ma m in out out 10mv/div v out v in time (10 s ) m /div v = 2.7v v = 1.85v i = 5ma to 200ma t = t = 1 s in out out r f m 5ma 200ma 10mv/div v out i out 9080 70 60 50 40 30 20 10 0 10 100 1k 10k 100k 1m frequency (hz) psrr (db) 10m 200ma 5ma 100ma v = 4.15v in v = 3.15v c = 1 f out out m 10 1 0.1 0.01 10 100 1k 10k frequency (hz) output spectal noise density ( m v/ ? ) hz 100k load i = 185ma out c = c = 1 m in out f v = 1.85v out noise = 141.6 v m rms time (100 s ) m /div 10mv/div v = 2.7v to 6.5v, slew rate = 1v/ s v = 1.85v, i = 200ma m in out out v out v in
tps728xx series sbvs095 ? august 2007 typical characteristics (continued) over operating temperature range (t j = ? 40 c to +125 c), v in = v out(typ) + 0.5v or 2.7v, whichever is greater; i out = 0.5ma, v en = v set = v in , c out = 1.0 f, unless otherwise noted. typical values are at t j = +25 c. load transient response enable transient response figure 32. figure 33. v in ramp up and ramp down response vset pin toggle figure 34. figure 35. vset pin toggle vset pin toggle figure 36. figure 37. copyright ? 2007, texas instruments incorporated submit documentation feedback 11 time (2ms ) /div 1v/div v in v out time (10 s ) m /div v transition time < 40 s (2% settling) m out v out v set v transitioning from 1.85v to 3.15v i = 1ma out out 200mv/div www.ti.com time (100 s ) m /div v = 3.8v, v = 3.3v, i = 0ma enable = 0.4v to 1v to 0.4v in out out 200mv/div500mv/div en v out time (10 s ) m /div v = 3.8v v = 3.3v i = 5ma to 200ma t = t = 1 s in out out r f m 5ma 200ma 10mv/div v out i out time (100 s ) m /div v transitioning from 3.15v to 1.85v i = 1ma out out v out v set 200mv/div time (40 s ) m /div v transitioning from 1.85v to 3.15v i = 10ma out out v out v set v transition time < 40 s (2% settling) m out 200mv/div
tps728xx series sbvs095 ? august 2007 typical characteristics (continued) over operating temperature range (t j = ? 40 c to +125 c), v in = v out(typ) + 0.5v or 2.7v, whichever is greater; i out = 0.5ma, v en = v set = v in , c out = 1.0 f, unless otherwise noted. typical values are at t j = +25 c. vset pin toggle figure 38. 12 submit documentation feedback copyright ? 2007, texas instruments incorporated www.ti.com time (20 s/div) m v transitioning from 3.15v to 1.85v i = 10ma out out v out v set 200mv/div
application information input and output capacitor application examples board layout recommendations to tps728xx series sbvs095 ? august 2007 another area where the tps728xx can be used the tps728xx series belongs to a family of new effectively is in dynamic voltage scaling (dvs) generation ldo regulators that use innovative applications. in dvs applications, it is required to circuitry to achieve ultra-wide bandwidth and high dynamically switch between a high operational loop gain, resulting in extremely high psrr (up to voltage to a low standby voltage in order to balance 1mhz) at very low headroom (v in ? v out ). these performance of processors and achieve power features, combined with low noise, low ground pin savings. modern multimillion gate microprocessors current, and ultra-small packaging, make this device fabricated with the latest sub-micron processes save ideal for portable applications. this family of on power by transitioning to a lower voltage to reduce regulators offers sub-bandgap output voltages, leakage currents without losing content. this current limit and thermal protection, and is fully architecture enables the microprocessor to transition specified from ? 40 c to +125 c. quickly into an operational state (wake up) without requiring reloading of the states from external figure 39 shows the basic circuit connections. memory, or a reboot. requirements although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1 f to 1.0 f low equivalent series resistance (esr) capacitor across the input supply near the regulator. this capacitor counteracts reactive input sources and improves transient response, noise rejection, and ripple rejection. a higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated, or if the device is not located near the power source. if source impedance figure 39. typical application circuit is not sufficiently low, a 0.1 f input capacitor may be necessary to ensure stability. the tps728xx is designed to be stable with standard eeprom-based applications require the ceramic capacitors with values of 1.0 f or larger at programming voltage to be higher than the operating the output. x5r- and x7r-type capacitors are best voltage. the tps728xx suits such applications where because they have minimal variation in value and the maximum programming voltage of the eeprom esr over temperature. maximum esr should be less is higher than the operating voltage. the vset logic than 1.0 ? . pin allows the application to transition between the higher eeprom programming voltage and the lower operating voltage. for example, the tps728xx improve psrr and noise performance typically takes less than 40 s to transition from a lower voltage of 1.85v to a higher voltage of 3.15v to improve ac performance such as psrr, output under an output load of 1ma to 10ma, as shown in noise, and transient response, it is recommended that figure 35 and figure 37 , respectively. the special the board be designed with separate ground planes circuitry in the tps728xx helps transition from the for v in and v out , with each ground plane connected higher voltage to the lower voltage under no load. only at the gnd pin of the device. in addition, the the load on the output at the end of the programming ground connection for the output capacitor should cycle is typically under 10ma. output voltage connect directly to the gnd pin of the device. high overshoots and undershoots are minimal under this esr capacitors may degrade psrr. load condition. the tps728xx typically takes less than 1ms of transition time going from 3.15v to 1.85v, as shown in figure 36 and figure 38 , respectively. both output states of the tps728xx are programmable between 0.9v to 3.6v. copyright ? 2007, texas instruments incorporated submit documentation feedback 13 www.ti.com tps728xx gnd en vset in out v in v out 1 f m 1 f m 2.7v to 6.5v 0.9v to 3.6v on off on (v ) out2 off (v ) out1
internal current limit shutdown dropout voltage undervoltage lock-out (uvlo) minimum load transient response tps728xx series sbvs095 ? august 2007 the tps728xx internal current limits help protect the regulator during fault conditions. during current limit, the output sources a fixed amount of current that is largely independent of output voltage. for reliable operation, the device should not be operated in a current limit state for extended periods of time. the pmos pass element in the tps728xx has a built-in body diode that conducts current when the voltage at out exceeds the voltage at in. this current is not limited, so if extended reverse voltage operation is anticipated, external limiting to 5% of rated output current may be appropriate. figure 40. circuit showing en tied high when shutdown capability is not required the enable pin (en) is active high and is compatible with standard and low voltage, ttl-cmos levels. when shutdown capability is not required, en can be connected to the in pin, as shown in figure 40 . figure 41 shows when both en and vset are tied to in. the tps728xx, with internal active output pulldown circuitry, discharges the output to within 5% of v out with a time ( t) of: where: figure 41. circuit to tie both en and vset high r l = output load resistance c out = output capacitance the tps728xx uses a pmos pass transistor to the tps728xx uses an undervoltage lock-out circuit achieve low dropout. when (v in ? v out ) is less than to keep the output shut off until the internal circuitry is the dropout voltage (v do ), the pmos pass device is operating properly. the uvlo circuit has a deglitch in the linear region of operation and the feature so that it typically ignores undershoot input-to-output resistance is the r ds(on) of the pmos transients on the input if they are less than 5 s pass element. v do approximately scales with output duration. the uvlo circuit triggers at approximately current because the pmos device behaves like a 2.3v on an undershooting or a falling input voltage. resistor in dropout. on the tps728xx, the active pulldown discharges v out when the device is in uvlo off condition. as with any linear regulator, psrr and transient however, the input voltage must be greater than 0.8v response are degraded as (v in ? v out ) approaches for the active pulldown to work. dropout. this effect is shown in figure 25 and figure 26 in the typical characteristics section. the tps728xx is stable with no output load. traditional pmos ldo regulators suffer from lower as with any regulator, increasing the size of the loop gain at very light output loads. the tps728xx output capacitor reduces over/undershoot magnitude employs an innovative, low-current mode circuit but increases duration of the transient response. under very light or no-load conditions, resulting in improved output voltage regulation performance down to zero output current. 14 submit documentation feedback copyright ? 2007, texas instruments incorporated www.ti.com tps728xx gnd en vset in out v in v out 1 f m 1 f m 2.7v to 6.5v 0.9v to 3.6v 2k w tps728xx gnd en vset in out v in v out 1 f m 1 f m 2.7v to 6.5v 0.9v to 3.6v vset2 vset1 2k w t = 3 60 r l 60 + r l c out
thermal information thermal protection power dissipation (1) package mounting tps728xx series sbvs095 ? august 2007 it was not intended to replace proper heatsinking. continuously running the tps728xx into thermal shutdown degrades device reliability. thermal protection disables the output when the junction temperature rises to approximately +160 c, allowing the device to cool. when the junction the ability to remove heat from the die is different for temperature cools to approximately +140 c the each package type, presenting different output circuitry is again enabled. depending on power considerations in the printed circuit board (pcb) dissipation, thermal resistance, and ambient layout. the pcb area around the device that is free temperature, the thermal protection circuit may cycle of other components moves the heat from the device on and off. this cycling limits the dissipation of the to the ambient air. performance data for jedec low- regulator, protecting it from damage as a result of and high-k boards are given in the dissipation overheating. ratings table. using heavier copper increases the effectiveness in removing heat from the device. the any tendency to activate the thermal protection circuit addition of plated through-holes to heat-dissipating indicates excessive power dissipation or an layers also improves the heatsink effectiveness. inadequate heatsink. for reliable operation, junction temperature should be limited to +125 c maximum. power dissipation depends on input voltage and load to estimate the margin of safety in a complete design conditions. power dissipation (p d ) is equal to the (including heatsink), increase the ambient product of the output current times the voltage drop temperature until the thermal protection is triggered; across the output pass element (v in to v out ), as use worst-case loads and signal conditions. for good shown in equation 1 : reliability, thermal protection should trigger at least +35 c above the maximum expected ambient condition of your particular application. this configuration produces a worst-case junction temperature of +125 c at the highest expected solder pad footprint recommendations for the ambient temperature and worst-case load. tps728xx are available from the texas instruments web site at www.ti.com . the internal protection circuitry of the tps728xx has been designed to protect against overload conditions. figure 42. yzu wafer chip-scale package dimensions (in mm) copyright ? 2007, texas instruments incorporated submit documentation feedback 15 www.ti.com p = (v v ) i - d in out out n tes: o 1,3951,345 1. all linear dimen eters. sions are in millim 2. this drawing is sub out notice. ject to change with 1,0250,975
package option addendum www.ti.com 15-may-2018 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples TPS728120150DRVR active wson drv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 dao tps728120150drvt active wson drv 6 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 dao tps728175295yzur active dsbga yzu 5 3000 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 au tps728175295yzut active dsbga yzu 5 250 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 au tps728180285yzur active dsbga yzu 5 3000 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 dt tps728180285yzut active dsbga yzu 5 250 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 dt tps728180300yzur active dsbga yzu 5 3000 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 vl tps728180300yzut active dsbga yzu 5 250 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 vl tps728185295yzur active dsbga yzu 5 3000 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 vm tps728185295yzut active dsbga yzu 5 250 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 vm tps728185315drvt active wson drv 6 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 byw tps728185315yzur active dsbga yzu 5 3000 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 fn tps728185315yzut active dsbga yzu 5 250 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 fn tps728285180yzur active dsbga yzu 5 3000 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 tl tps728285180yzut active dsbga yzu 5 250 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 tl tps728330180yzur active dsbga yzu 5 3000 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 dj tps728330180yzut active dsbga yzu 5 250 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 dj
package option addendum www.ti.com 15-may-2018 addendum-page 2 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples tps728330185drvr active wson drv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 sbd tps728330185drvt active wson drv 6 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 sbd (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) rohs: ti defines "rohs" to mean semiconductor products that are compliant with the current eu rohs requirements for all 10 rohs substances, including the requirement that rohs substance do not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, "rohs" products are suitable for use in specified lead-free processes. ti may reference these types of products as "pb-free". rohs exempt: ti defines "rohs exempt" to mean products that contain lead but are compliant with eu rohs pursuant to a specific eu rohs exemption. green: ti defines "green" to mean the content of chlorine (cl) and bromine (br) based flame retardants meet js709b low halogen requirements of <=1000ppm threshold. antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant TPS728120150DRVR wson drv 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 q2 tps728120150drvt wson drv 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 q2 tps728175295yzur dsbga yzu 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728175295yzut dsbga yzu 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728180285yzur dsbga yzu 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728180285yzut dsbga yzu 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728180300yzur dsbga yzu 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728180300yzut dsbga yzu 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728185295yzur dsbga yzu 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728185295yzut dsbga yzu 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728185315drvt wson drv 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 q2 tps728185315yzur dsbga yzu 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728185315yzut dsbga yzu 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728285180yzur dsbga yzu 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728285180yzut dsbga yzu 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728330180yzur dsbga yzu 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728330180yzut dsbga yzu 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 q1 tps728330185drvr wson drv 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 q2 package materials information www.ti.com 22-may-2018 pack materials-page 1
device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant tps728330185drvt wson drv 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 q2 *all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) TPS728120150DRVR wson drv 6 3000 203.0 203.0 35.0 tps728120150drvt wson drv 6 250 203.0 203.0 35.0 tps728175295yzur dsbga yzu 5 3000 182.0 182.0 20.0 tps728175295yzut dsbga yzu 5 250 182.0 182.0 20.0 tps728180285yzur dsbga yzu 5 3000 182.0 182.0 20.0 tps728180285yzut dsbga yzu 5 250 182.0 182.0 20.0 tps728180300yzur dsbga yzu 5 3000 182.0 182.0 20.0 tps728180300yzut dsbga yzu 5 250 182.0 182.0 20.0 tps728185295yzur dsbga yzu 5 3000 182.0 182.0 20.0 tps728185295yzut dsbga yzu 5 250 182.0 182.0 20.0 tps728185315drvt wson drv 6 250 203.0 203.0 35.0 tps728185315yzur dsbga yzu 5 3000 182.0 182.0 20.0 tps728185315yzut dsbga yzu 5 250 182.0 182.0 20.0 tps728285180yzur dsbga yzu 5 3000 210.0 185.0 35.0 tps728285180yzut dsbga yzu 5 250 210.0 185.0 35.0 tps728330180yzur dsbga yzu 5 3000 182.0 182.0 20.0 package materials information www.ti.com 22-may-2018 pack materials-page 2
device package type package drawing pins spq length (mm) width (mm) height (mm) tps728330180yzut dsbga yzu 5 250 182.0 182.0 20.0 tps728330185drvr wson drv 6 3000 203.0 203.0 35.0 tps728330185drvt wson drv 6 250 203.0 203.0 35.0 package materials information www.ti.com 22-may-2018 pack materials-page 3
www.ti.com package outline c 0.625 max 0.3 0.2 0.5 typ 5x 0.35 0.25 0.5 typ 0.433 b e a d 4222196/a 11/2015 dsbga - 0.625 mm max height yzu0005 die size ball grid array notes: 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3 symm symm ball a1 corner seating plane ball typ 0.05 c c b a 1 2 0.015 c a b scale 10.000d: max = e: max = 1.358 mm, min = 0.99 mm, min = 1.297 mm0.93 mm
www.ti.com example board layout 5x ( )0.25 (0.5) typ (0.433) typ ( ) metal 0.25 0.05 max solder mask opening metal under solder mask ( ) solder mask opening 0.25 0.05 min 4222196/a 11/2015 dsbga - 0.625 mm max height yzu0005 die size ball grid array notes: (continued) 3. final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. refer to texas instruments literature no. snva009 (www.ti.com/lit/snva009). solder mask details not to scale 1 3 symm symm land pattern example scale:50x c 2 a b non-solder mask defined (preferred) solder mask defined
www.ti.com example stencil design (0.433) typ (0.5) typ 5x ( 0.25) (r ) typ0.05 metal typ 4222196/a 11/2015 dsbga - 0.625 mm max height yzu0005 die size ball grid array notes: (continued) 4. laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. c 1 2 a b 3 symm symm solder paste example based on 0.1 mm thick stencil scale:50x
generic package view images above are just a representation of the package family, actual package may vary. refer to the product data sheet for package details. drv 6 wson - 0.8 mm max height plastic small outline - no lead 4206925/f
www.ti.com package outline c 6x 0.35 0.25 1.6 0.1 6x 0.3 0.2 2x 1.3 1 0.1 4x 0.65 0.8 0.7 0.05 0.00 b 2.1 1.9 a 2.1 1.9 (0.2) typ wson - 0.8 mm max height drv0006a plastic small outline - no lead 4222173/b 04/2018 pin 1 index area seating plane 0.08 c 1 3 4 6 (optional) pin 1 id 0.1 c a b 0.05 c thermal pad exposed 7 notes: 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. the package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. scale 5.500
www.ti.com example board layout 0.07 min all around 0.07 max all around (1) 4x (0.65) (1.95) 6x (0.3) 6x (0.45) (1.6) (r0.05) typ ( 0.2) via typ (1.1) wson - 0.8 mm max height drv0006a plastic small outline - no lead 4222173/b 04/2018 symm 1 3 4 6 symm land pattern example scale:25x 7 notes: (continued) 4. this package is designed to be soldered to a thermal pad on the board. for more information, see texas instruments literature number slua271 (www.ti.com/lit/slua271). 5. vias are optional depending on application, refer to device data sheet. if some or all are implemented, recommended via locations are shown. solder mask opening solder mask metal under solder mask defined metal solder mask opening solder mask details non solder mask defined (preferred)
www.ti.com example stencil design 6x (0.3) 6x (0.45) 4x (0.65) (0.7) (1) (1.95) (r0.05) typ (0.45) wson - 0.8 mm max height drv0006a plastic small outline - no lead 4222173/b 04/2018 notes: (continued) 6. laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. ipc-7525 may have alternate design recommendations. solder paste example based on 0.125 mm thick stencil exposed pad #7 88% printed solder coverage by area under package scale:30x symm 1 3 4 6 symm metal 7
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